1. Field of the Disclosure
The present disclosure relates generally to electronic devices and more particularly to electronic devices including non-volatile memory.
2. Description of the Related Art
One type of non-volatile memory, referred to as a NAND flash memory, uses a plurality of NAND strings that are arranged in rows and columns. Each NAND string includes a plurality of transistors that include a string of serially connected NAND storage cells connected in series with a select gate at the top and a select gate at the bottom of the string of NAND storage cells. In a typical NAND flash memory there are a plurality of local bit lines. Each one of the plurality of local bit lines is connected to a respective one of a plurality of NAND strings. Information stored at an individual NAND storage cell of a specific NAND string can be accessed through the individual storage cell's corresponding local bit line, i.e., its column, by applying appropriate control signals to the NAND string. For example, a select gate of a NAND string during a memory read operation can be turned on to electrically connect the NAND storage cells of the NAND string to its corresponding bit line, thereby allowing one of the plurality of NAND storage cells of the NAND string to be read during a read operation. However, as the geometries of transistors used to form the select gates of the NAND strings are scaled to smaller dimensions, the fabrication process used to form the select gates, which can be similar to the process used to form the NAND storage cells, can vary significantly enough to cause a wide range of threshold voltages (“Vts”) between select gates. A wide range of Vts between select gates can make it difficult to find a suitable window of operation to assure that each select gate of each NAND string is appropriately controlled during access operations.